Frequency response analysis (FRA) uses injected test signals and Fourier analysis to measure the frequency response of a closed loop negative feedback circuit in the time domain. This technique is based on the voltage gain part of the Middlebrook method for linear systems. FRA can determine the average small signal frequency response of nonlinear circuits and switched-mode circuits such as the feedback loop of a SMPS circuit without the need for an equivalent small-signal (average) model.

Middlebrook Method

For the general negative feedback loop system shown in Fig. 1, its close loop gain is given by

$$G=\frac{A}{1+\beta A}$$

Here, A is the forward gain and \(\beta\) is the feedback gain. The term \(\beta A\) is defined as the system loop gain T.

Determining the loop gain response of a linear, closed loop system is a problem solved well by Middlebrook's method[1]. That method uses sine wave test signals injected into the closed loop system to independently solve for the voltage and current gains. The loop voltage gain Tv is determined by inserting a voltage signal source in series into the loop. The loop current gain Ti is determined by adding a current signal source in parallel to the loop. Once the loop voltage gain Tv and the loop current gain Ti are obtained the overall loop gain T can be found from

$$T=\frac{T_vT_i-1}{T_v+T_i-2}$$

For large values of Tv and Ti the loop gain equation can be approximated as

$$T=\frac{T_vT_i}{T_v+T_i}$$

This is like the formula for two parallel resistors. So the overall loop gain T will be smaller than the smallest of either the loop current gain Ti or the loop voltage gain Tv.

The Middlebrook method can be easily implemented in simulation for linear circuits using the AC frequency domain analysis available in all circuit simulators.

To apply the Middlebrook method to the negative feedback op amp circuit in Figure 2, two possible signal injection points A and B are shown.

Figure 3 shows the circuit simulation setup for injection point A. Because this is a linear circuit, the voltage and current loop gain responses can be simulated using AC analysis in the frequency domain. The simulated frequency responses using the TopSpice simulator are plotted in Figure 4. As can be seen in the plot, for this injection point the total gain is significantly lower than either the voltage or current gain over most of the frequency range.

Figure 5 shows the circuit simulation setup for injection point B. The simulated frequency responses using the TopSpice simulator are plotted in Figure 6. The plot shows the voltage gain almost exactly matches the total gain. Hence, for this injection point we can neglect the current gain part.

FRA Measurement

As can be seen from Figure 6, for this injection point Tv << Ti and the loop gain is almost exactly T=Tv. At injection point B, the op amp input can be considered as an infinite impedance while ZF can be approximated by the feedback impedance. However, as can be seen from Figure 6, if a signal source injection point in the feedback loop can be identified where the "reverse impedance" ZR is much smaller than the "forward impedance" ZF, the current gain is much larger than the voltage gain at this point. Hence, it is sufficient to measure only the voltage gain to get the loop gain. Because it is not practical to implement the full Middlebrook method in the time domain, the FRA method takes advantage of the condition ZR << ZF to measure the loop gain with just the voltage gain measurement in the time domain so it is applicable to all circuits including SMPS.

Figure 7 shows the FRA measurement simulation setup using the TopSpice simulator for the same circuit as Figure 5.

$$gain=\frac{Vpos}{Vneg}=\frac{Vr}{Vf}$$

Figure 8 compares the TopSpice simulated loop gain results using the full Middlebrook method and FRA for the same circuit using injection point B. The results of both measurement methods are very good agreement.

Switch Mode Power Supply Example

Figure 9 shows the TopSpice simulator FRA setup for a generic SMPS circuit using Basso's PWMCM2 current-mode controller transient switched model block.

The first step in performing a FRA simulation of an SMPS circuit is to determine the time to steady-state when the circuit output becomes stable. As it can be seen in Figure 10, for the sample circuit this value is around 450us.

The next step is to insert the test signal sine voltage source. To make an accurate loop gain measurement, the injection point must meet the condition ZR << ZF as established previously. For most SMPS circuits, such a point can normally be found at the feedback input pin of the SMPS controller. At this point, ZR is approximately the feedback resistance and ZF is the error amplifier input impedance as shown in Figure 9. Since the feedback resistance is much smaller than the amplifier input impedance, it meets the required condition. Another such an injection point is between the supply output and the feedback resistor divider.

For nonlinear and switching circuits, the choice of the sine wave amplitude will impact accuracy and the signal to noise of the method. The smaller the amplitude, the lower the signal to noise ratio. But if the amplitude is too large, the system is not operating linearly resulting in harmonic distortion of the test signal. A default starting value of 10mV is recommended unless circuit operating characteristics indicate otherwise. The direction of feedback should be from the source positive to negative nodes. For example for a SMPS circuit, if the voltage source is connected directly to the feedback pin, the negative node is the feedback pin. The frequency of the source is irrelevant since it is set by the simulator for each FRA frequency run.

In the FRA setup, the log frequency sweep is selected from 100Hz to 100KHz with two points per decade.

Figure 11 shows the TopSpice FRA setup dialog. The following optional parameters are specified on the FRA setup:

Time steady-state is set to the time when the circuit output becomes stable around 450us. The simulation up to steady-state is only performed once on the first run. On subsequent runs, the simulation is started at the steady-state time point.

Number of periods sets the maximum number of the test signal sine wave periods to simulate.

Time run maximum sets the maximum simulation run time for any FRA frequency. The simulation run time for a test signal frequency will be either the maximum number of periods times its period or the one period time if its longer than the maximum run time (less the steady-state time). For this setup, it is set at 1ms. Hence, at 100Hz, the simulation will run for 11ms. At 10KHz, it will run for 200us.

After the .FRA analysis is completed, the frequency response results are automatically plotted by default regardless of any other "autoplot" commands was specified. The results are printed as a table to the output .OUT listing file. The table data is available in TopView as the plot variables GAINDB_FRA and PHASE_FRA under the "Fourier/FRA" data category.

Figure 12 shows the FRA simulation results Bode plot.

UCC2803 SMPS Example

Figure 13 shows the TopSpice simulator FRA setup for a UCC2803 12V boost SMPS circuit.

As in the previous example, we select the feedback input pin of the SMPS controller as the injection point for the FRA test signal sine voltage source. This injection point meets the ZR << ZF condition because ZR is approximately the feedback resistance and ZF is the error amplifier input impedance.

From the simulated transient response of the circuit shown in Figure 14, we can determine the time to steady-state is around 3.7ms.

Figure 15 shows the TopSpice FRA simulation setup. A log frequency sweep is selected from 100Hz to 100KHz with two points per decade.

The following optional parameters are also specified on the FRA setup:

• Time steady-state is set to the time 3.7ms.
• The maximum run time for each frequency step is limited to 10ms. Hence, for this setup, at 100Hz, the simulation will run for one period and total time of 13.7ms. At 100KHz, it will run for five periods for a total time of 3.75ms.
• In addition, the FRA test signal amplitude limits are set as shown to improve the measurement response at lower frequencies.
The test signal amplitude vs frequency for the specified limits is shown in Figure 16.

Figure 17 shows the FRA simulation results Bode plot.

Related Resources

• Robert Bolanos with Southwest Research Institute has a YouTube channel

  youtube.com/@RobertBolanos

  with videos in the design and analysis of SMPS circuits including detailed tutorials in using the TopSpice FRA on practical SMPS circuits.

References

• R. D. Middlebrook, "Measurement of Loop Gain in Feedback Systems," Int. J. Electronics, Vol. 38, no. 4, pp. 485-512, April 1975.
• S. Franco, "Middlebrook's and Rosenstark's Loop Gain Measurements," EDN, December 2018.