TopSpice is an affordable integrated computer-aided circuit design software package offering advanced native mixed-mode mixed-signal analog/digital/behavioral simulation based on the industry standard SPICE simulator program.



TopSpice is a true analog/digital/behavioral mixed-mode circuit simulator for the PC. It offers the most advanced SPICE simulator in its price range, compatibility, and an easy to use integrated design environment from schematic capture to graphical waveform analysis.

With TopSpice you have the choice to design from schematic drawings, text netlist (SPICE) files or both. All design and simulation functions are available from either the schematic or netlist editor front-ends.

TopSpice includes a native full-featured mixed-mode mixed-signal circuit simulator capable of simulating circuits containing any arbitrary combination of analog devices, digital functions and high-level behavioral blocks. With TopSpice you can verify and optimize your design from the system to the transistor level. By using the built-in logic simulator to simulate the digital sections of your circuit instead of analog equivalents, mixed-mode simulation times can be reduced by orders of magnitude.

TopSpice offers industry standard PSpice and HSPICE compatible* simulation. TopSpice works with most PSpice netlists, manufacturer SPICE model libraries and IC foundry HSPICE libraries.


Product Highlights

  • Integrated design enviroment with schematic capture, simulation, waveform plotting and post-processor.
  • Native mixed-mode mixed-signal simulation.
  • Built-in event-driven logic simulator.
  • Simulator supports large circuit sizes (up to available system resources).
  • Multiple/parallel simulation runs for the same circuit.
  • Built-in device models: diode (levels 1 and 3), BJT (levels 1 and 4), MOSFET (levels 1, 2, 3, 7, 8, 44, 49, 53, 55), JFET, GaAs FET (levels 1, 2, 3, 6), MESFET, nonlinear magnetic core, ferroelectric capacitor, switch, lossy transmission line and digital primitives.
  • Extensive model libraries of over 30,000 analog and digital components.
  • Compatible with most PSpice netlists and manufacturer SPICE model libraries.
  • IC foundry HSPICE model library support*.
  • SMPS design model libraries.
  • HSPICE compatible MOSFET "model binning".
  • Analog behavioral and frequency domain modeling.
  • Analyses: bias point, DC sweep, transient, AC sweep, noise, distortion, sensitivity, transfer function, Fourier, temperature, Monte Carlo, worst case, parametric stepping, "alter" circuit.
  • Advanced noise analysis functions.
  • Interactive graphical post-processor with "auto plot".
  • Waveform expression plots.
  • Powerful waveform, performance and statistical analysis functions.
  • All design and simulation functions are available from either the schematic or netlist editor front-ends.

* Compatibility is limited only to the set of HSPICE features and functions implemented in TopSpice.


Advanced simulation and plotting functions.



Native Mixed-Mode Simulation

SPICE has become the de facto industry standard for analog circuit simulation. It offers the advantages of a large user base, large number of existing device models, modeling support by component manufacturers, and compatibility between CAD vendors. However, SPICE is an analog only simulation technology. State-of-art mixed technology circuit designs require a hierarchical top-down design environment with a circuit simulator capable of handling different levels of abstraction simultaneously.

TopSpice implements a fully integrated mixed-mode simulation technology. The analog electrical simulation and the logic simulation algorithms are merged into a single simulator architecture. Both algorithms operate under a single event scheduler to most efficiently solve time advancement, backup, signal conversion and convergence issues in mixed-mode simulation.

The logic simulator implemented in TopSpice is fully event-driven. The digital section of the circuit is only evaluated when a logic event takes place during the simulation. Since logic simulation is most efficiently handled in terms of discrete time steps, TopSpice uses independent time steps for simulating the analog and digital sections of the circuit. TopSpice also implements a common SPICE like input syntax for both analog and digital sections for getting those designers familiar with SPICE rapidly on board.



Advanced Features

  • Macromodeling with parameter passing.
  • Automatic model libraries search.
  • Supports most PSpicetm syntax extensions, and many HSPICEtm extensions and model libraries.
  • User defined parameters and expressions.
  • State-of-art convergence aid algorithms solve difficult convergence problems.
  • Monte Carlo and worst case analyses allow with device and lot statistical distributions.
  • BSIM3 v3.2 (levels 7, 8, 49, 53) and EKV v2.6 (levels 44 and 55) MOSFET models.
  • VBIC (level 4) BJT model.
  • "Statz", "Curtice" and Triquint GaAs FET models (levels 1, 2, 3 and 6).
  • HSPICE compatible* diode level 3, and geometrical integrated resistor and capacitor models.
  • Jiles-Atherton nonlinear magnetic core model.
  • Table look-up modeling of capacitors and inductors.
  • Built-in advanced ferroelectric capacitor model.
  • Lossy transmission line models.
  • Analog behavioral modeling using arbitrary equations, logical expressions and look-up tables.
  • Linear system frequency domain modeling using arbitrary Laplace transforms, frequency response and s-parameter tables.
  • Enhanced K element allows unlimited number of coupled inductors.
  • Advanced noise analysis features with custom noise source options.
  • PRINT output supports device currents, source impedances, magnetic flux and digital states.
  • Binary output option saves all voltages, device currents and digital node states.
  • Complex AC waveform expression support.
  • FFT, histogram and Smith chart plots.
  • CSDF data file support allows you to plot simulation data from other SPICE simulators such as HSPICE and PSpice.
  • Support for encrypted model files.


TopSpice provides built-in magnetic core and other advanced models.


Analog Behavioral Modeling

The analog behavioral modeling capability allows the designer to describe electronic components and circuit functional blocks using transfer functions. This "black box" approach is a very powerful tool for modeling complex devices, speeding up simulation of large systems and developing a top-down design methodology.

The following options for specifying transfer functions are available in TopSpice: arbitrary equations of V, I, time and temperature; built-in math functions; look-up tables; Laplace transforms; frequency response tables; s-parameter tables; logical and relational expressions.

*Behavioral model of comparator
ECOMP 1 0 TABLE {V(in)} = (-1mV,0.2V) (1mV,3.6V)
RES 1 0 150 ;source load

*Transmission line used as a delay line
TDLY 1 0 delay 0 (ZO=150 TD=20ns)
RTL delay 0 150 ;termination

*Digital D flip-flop element
U1 DFF outlo outhi $D_HI $D_HI in delay FFD
.MODEL FFD UEFF (TPCLKLH=2ns TPCLKHL=2ns)

TopSpice mixed-mode description of a FSK demodulator.



Integrated Design Enviroment

TopSpice offers a fully integrated environment to capture, simulate, and analyze your circuit designs. Its flexible architecture allows the designer to integrate all the design tools, including third party tools and model libraries, into a complete EDA system.


Schematic Capture

The schematic editor front-end provides an easy way to create and edit circuit drawings. TopSpice Schematic features:


Easy Analysis Setup

TopSpice offers both an easy to use interface for beginners and maximum flexibility for expert SPICE users. Most simulation analysis commands can be specified by selecting menu options. Experienced SPICE users also have the option of entering commands in text form directly on the schematic drawing or a separate command file.




Graphical Post-Processor With Waveform Analysis

Interactive graphical SPICE post-processor program to plot and analyze SPICE output data. Features smart auto-plotting, multiple plot axes, analog and digital waveforms on the same graph, cursor measurements, powerful waveform analysis functions, statistical and performance measurements, Smith charts, polar charts, "eye display" plots, complex-number expressions, and complete graph labeling and formatting options.


Powerfun waveform and data analysis functions.



Model Libraries

Extensive simulation model library of over 30,000 analog and digital parts. TopSpice is also compatible with most SPICE model libraries supplied by component manufacturers and other SPICE vendors, and many IC foundry process model libraries.

The model library includes discrete parts, analog IC parts, optoelectronic devices,, magnetic parts, digital logic families, power semiconductors, SMPS design models, cables, vacuum tubes, models from component vendors, and many more.

To view the complete list of models included, browse the Model Library Catalog file (library.txt). Or, download and install the Demo version. Then, open the "Model Library Database" icon in the TopSpice Demo program folder, or select Tools|Model libraries|Model Database command from either the Schematic Editor or Circuit File Editor menu.




Documentation

Complete manuals (over 600 pages) available in PDF format, online help, over 350 example circuit files, and complete device model library database.


User Support

We provide comprehensive and prompt support for our products to registered users:

2 Limitations apply, see service Terms and Conditions for full details.


Updates

Penzar Development makes frequent product updates in response to technology advances and user feedback. Service Updates and Patches for the current version are free to registered users. Major updates are offered as version upgrade products at a substantial discount over the full product price.



Prices and product specifications are subject to change without notice.

PSpice is a registered trademark of Cadence Design Systems, Inc. HSPICE is a registered trademark of Synopsys Inc. Other company and product names are trademarks or registered trademarks of their respective holders.


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